ׂמהנדס – ASIC Top Level Integrator

Job Description:

• Top level integration of complex SOC ASICs
• Clock and reset chip architecture
• DFT strategy
• RTL digital design
• Interface with back-end team

Requirements:

• BS or MS EE  degree from top university
• Strong technical skill, open mind and ability to work in "multi-tasks" mode
• Proved record of top level integration of complex SOC ASICs
• At least 3 year experience in ASIC design
• Back-end tool experience (Synthesis + STA) is strong advantage